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CMPE 310 Systems Design and Programming

Class schedule, topic and assignments

Monday and Wednesday 2:30-3:45 SHH 210 ACIV

Friday, discussion, optional, 9:00-9:50 ITE 237

Friday, laboratory, required, 10:00-11:50 ITE 375


Please do not work projects or homework until assigned.
Some updates are still in progress.

Lec Date   Subject                            Reading          Homework
                                              Textbook         assigned due

 1. 8/26   Introduction, Number systems       Ch1              HW1

 2. 8/31   Getting and using NASM             WEB              
                                              nasmdoc.txt

 3. 9/2    Registers, syntax, sections        Ch2,3            HW2

3L. 9/4    Running Nasm, Verilog, VHDL lab    WEB

Labor Day 9/7

 4. 9/9    Arithmetic and shifting            Ch4,5             proj1
                                              nasmdoc.txt               HW1

4L. 9/11   Using Nasm                         WEB

 5. 9/14   Using debugger                     WEB help nasm    HW3      HW2

 6. 9/16   Branching and loops                Ch6

6L. 9/18   More NASM                          WEB

 7. 9/21   Subroutines                                         proj2

 8. 9/23   BIOS bootable program                               proj3            

 9. 9/23   syscall and BIOS calls                                       HW3     

9L. 9/25   More NASM Proj1,2,3                WEB

10. 9/28   Hardware interface                                           proj1*

11. 9/30   Privileged instructions            nasmdoc.txt

11L. 10/2  Variety                            WEB

12. 10/5   Linux kernel calls                 Lecture notes

13. 10/7   Review                             review                    proj2*             

13L.10/9   Hardware                           WEB

14. 10/12  mid-term exam                      sleep

15. 10/14  Memory hardware organization                                 proj3*             

15L.10/16  Get three dips into CIS            WEB

16. 10/19  Memory decoding and wiring

17. 10/21  Memory RAM, DRAM                                     HW4
                                                                Proj4
17L.10/23  connect busses in CIS              WEB

18. 10/26  Memory DRAM, DDR, Flash

19. 10/28  Input Output wiring                                          HW4

19L.10/30  connect wires in CIS               WEB               HW5

20. 11/2   Input Output devices

21. 11/4   Input Output 3 more devices                                  HW5

21L.11/6  finish CIS, Allegro training        WEB               Proj5   Proj4*

22. 11/9   Hardware Interrupts

23. 11/11  Disc Drum CD                                         HW6

23L.11/13  finish Proj4, work Proj5           WEB

24. 11/16  Busses

25. 11/18   Protected Mode Addressing                                   HW6

25L.11/20  Work on projects                   WEB               Proj6   Proj5*

26. 11/23   Virtual Memory paging hardware

27. 11/25  Arithmetic Logic Unit

28. 11/30  Architecture                                         Proj7   Proj6*

29. 12/2   Review                             review  

29L.12/4   demo projects (Last chance)                                 Proj7*

30. 12/11  Final exam SSH 210 1:00pm - 3:00pm 

    No late homework or project accepted after midnight 12/13
    Late penalty is 10% per week, limit 50%.
    * submitted, not graded until next weekend (not late for a while)

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Last updated 12/10/2015