-- util_pkg.vhdl  define functions  to_integer  "="  "/="  on std_logic_vector
--                for statements such as:
--                mux_ctl <= MEM_OP=lw and MEM_rd/="00000" ;

library IEEE;
use IEEE.std_logic_1164.all;

package util_pkg is
  function to_integer(sig : std_logic_vector) return integer;
  function "=" (left, right : std_logic_vector) return std_logic;
  function "/=" (left, right : std_logic_vector) return std_logic;
  -- main memory, a process reads a file to load memory
  subtype word is std_logic_vector(31 downto 0);
  type mem_array is array(integer range <>) of word;
  shared variable memory: mem_array(0 to 4095);  -- max 12 bit addresses
  -- general register memory
  type reg_mem_type is array (natural range <>) of word;
  shared variable reg_mem : reg_mem_type(0 to 31) := (others =>(others =>'0'));
end package util_pkg;

package body util_pkg is
  function to_integer(sig : std_logic_vector) return integer is
    variable num : integer := 0;  -- descending sig as integer
  begin
    for i in sig'range loop
      if sig(i)='1' then
        num := num*2+1;
      else
        num := num*2;
      end if;
    end loop;  -- i
    return num;
  end function to_integer;
  function "=" (left, right : std_logic_vector) return std_logic is
    variable result : std_logic := '1';
  begin
    if left'length /= right'length then
      report "equal test on unequal lengths" severity warning;
      return '0';
    end if;
    if (left'left>left'right)=(right'left>right'right) then
      for i in left'range loop
        if left(i) /= right((right'left-left'left)+i) then
          result := '0';
        end if;
      end loop;
    else
      for i in left'range loop
        if left(i) /= right(right'high-(right'low-left'low+i)) then
          result := '0';
        end if;
      end loop;
    end if;
    return result;
  end function "=";
  function "/=" (left, right : std_logic_vector) return std_logic is
    variable result : std_logic := '0';
  begin
    if left'length /= right'length then
      report "not equal test on unequal lengths" severity warning;
      return '1';
    end if;
    if (left'left>left'right)=(right'left>right'right) then
      for i in left'range loop
        if left(i) /= right((right'left-left'left)+i) then
          result := '1';
        end if;
      end loop;
    else
      for i in left'range loop
        if left(i) /= right(right'high-(right'low-left'low+i)) then
          result := '1';
        end if;
      end loop;
    end if;
    return result;
  end function "/=";
end package body util_pkg;