at clock 0  PC=00000000
IF  stage inst=00000001
IF_PC_next    =00000004
ID  stage   IR=00000000
EX  stage   IR=00000000
MEM stage   IR=00000000
WB  stage   IR=00000000

at clock 1  PC=00000004
IF  stage inst=00000002
IF_PC_next    =00000008
ID  stage   IR=00000001
EX  stage   IR=00000000
MEM stage   IR=00000000
WB  stage   IR=00000000

at clock 2  PC=00000008
IF  stage inst=00000003
IF_PC_next    =0000000c
ID  stage   IR=00000002
EX  stage   IR=00000001
MEM stage   IR=00000000
WB  stage   IR=00000000

at clock 3  PC=0000000c
IF  stage inst=00000004
IF_PC_next    =00000010
ID  stage   IR=00000003
EX  stage   IR=00000002
MEM stage   IR=00000001
WB  stage   IR=00000000

at clock 4  PC=00000010
IF  stage inst=00000005
IF_PC_next    =00000014
ID  stage   IR=00000004
EX  stage   IR=00000003
MEM stage   IR=00000002
WB  stage   IR=00000001

at clock 5  PC=00000014
IF  stage inst=00000006
IF_PC_next    =00000018
ID  stage   IR=00000005
EX  stage   IR=00000004
MEM stage   IR=00000003
WB  stage   IR=00000002