// jkff_tt     full JK flip flop coded as nand gates, tested by truth table
//             also can be a master slave flip flop
//             also can be an edge triggered flip flop
//             also can be an AC flip flop

//           since nand is not an esim primitive, create a nand gate
define nand(a, b, c, out)
  circuits
    out <= ~(a&b&c) after 1ns;  // not of the and of a, b, c
  end circuits;  // pad unused inputs with #b1 or another copy of input
end nand;


define jkff(j, k, clk, r, s, q, q_)  //  full JK flip flop
                             // j and k are read on falling clock
                             // j and k can be active inputs when clock is hi
                             // clk is typically system clock gated by signal
                             // q is output, q_ is complement output
                             // r is reset, normally high, low to reset (clear)
                             // s is set,   normally high, low to set (preset)
  signal jc, kc, m0, m0_, m1, m1_, clk_;   // internal signals
  circuits
    jc  use nand(j  , clk , #b1 , jc  );
    kc  use nand(k  , clk , #b1 , kc  );
    m0  use nand(m0_, jc  , s   , m0  );
    m0_ use nand(m0 , kc  , r   , m0_ );
    c_  use nand(clk, #b1 , #b1 , clk_);
    m1  use nand(m0 , clk_, #b1 , m1  );
    m1_ use nand(m0_, clk_, #b1 , m1_ );
    q   use nand(q_ , m1  , s   , q   );
    q_  use nand(q  , m1_ , r   , q_  );
  end circuits;
end jkff;

// test circuit for JK flip flop
//
signal clk <= #b1;
signal start <= #b1; // used for circuit initialization 
signal reset <= #b0; // reset signal to all D flip flops
signal set   <= #b1; // set   signal to all D flip flops
signal q;  // JK flip flop output
signal q_; // JK flip flop complement output(spoken as q bar)
// one standard circuit symbol for complement is a bar over the top of a signal
signal j <= #b1;
signal k <= #b1;
circuits
  clk <= ~clk after 10ns;    // control circuitry
  start <= #b0 after 4ns;    // 1 initially, then always zero
  reset <= ~start after 1ns; // one time reset based on start

  jkff use jkff(j, k, clk, reset, set, q, q_);
end circuits;