// bmul8.e parallel multiply 8 bit x 8 bit // uses add8.e component // the main components are bmul8, special Booth 8 x 8 -> 16 bit multiplier // a basic building block a 8 bit adder is add8 that uses fadd // a specialized building block for the multiplier is badd4 // badd8.e 8 bit specialialized adder for Booth multiplier // uses a basic 8 bit adder, add4 // input a, three bits of the multiplier // input b, the multiplicand // input sum_in, the sum from the previos stage // output sum_out, the sum into the next stage // output two bottom bits of final product // Note: Most of the multiply algorithm is performed in here. define badd8(a[3], b[8], sum_in[8], sum_out[8], prod[2]) // multiplier action // a b // i+1 i i-1 multiplier, shift partial result two places each stage // 0 0 0 0 pass along // 0 0 1 +b add // 0 1 0 +b add // 0 1 1 +2b shift add // 1 0 0 -2b shift subtract // 1 0 1 -b subtract // 1 1 0 -b subtract // 1 1 1 0 pass along signal zero[8] <= #h00; signal bb[8]; signal psum[8]; signal b_bar[8]; signal two_b[8]; signal two_b_bar[8]; signal cout; signal cin; signal topbit; signal topout; signal nc1; circuits two_b <= b[6:0].#b0 after 1ns; b_bar <= ~b after 1ns; two_b_bar <= b_bar[6:0].#b1 after 1ns; bb <= with a select #b000 : zero; #b001 : b; #b010 : b; #b011 : two_b; #b100 : two_b_bar; // cin=1 #b101 : b_bar; // cin=1 #b110 : b_bar; // cin=1 #b111 : zero; otherwise : zero; end select after 1ns; cin <= with a select #b100 : #b1; // cin=1 #b101 : #b1; // cin=1 #b110 : #b1; // cin=1 otherwise : #b0; end select after 1ns; topbit <= with a select #b000 : #b0; #b001 : b[7]; #b010 : b[7]; #b011 : b[7]; #b100 : b_bar[7]; #b101 : b_bar[7]; #b110 : b_bar[7]; #b111 : #b0; otherwise : #b0; end select after 1ns; add4 use add8(sum_in, bb, cin, psum, cout); add5 use fadd(sum_in[7], topbit, cout, topout, nc1); sum_out[5:0] <= psum[7:2] after 1ns; sum_out[7] <= topout after 1ns; sum_out[6] <= topout after 1ns; prod <= psum[1:0] after 1ns; end circuits; end badd8; // bmul4.e full combinatorial 4 X 4 = 8 bit two's complement multiplier // Booth two's complement multiplication using badd4 component // a is multiplier input, b is multiplicand input, prod is output product define bmul8(a[8], b[8], prod[16]) signal zero[8] <= #h00; signal mul0[3]; signal s0[8]; signal s1[8]; signal s2[8]; circuits mul0 <= a[1:0].#b0 after 1ns; a0 use badd8(mul0, b, zero, s0, prod[1:0]); a1 use badd8(a[3:1], b, s0, s1, prod[3:2]); a2 use badd8(a[5:3], b, s1, s2, prod[5:4]); a3 use badd8(a[7:5], b, s2, prod[15:8], prod[7:6]); end circuits; end bmul8;