// bmul4.e parallel multiply 4 bit x 4 bit
//         uses add4.e component

// the main components are bmul4, special Booth 4 x 4 -> 16 bit multiplier
// a basic building block a 4 bit adder is add4 that uses fadd
// a specialized building block for the multiplier is badd4


// badd4.e 4 bit specialialized  adder for Booth multiplier
// uses a basic 4 bit adder, add4
// input a, three bits of the multiplier
// input b, the multiplicand
// input sum_in, the sum from the previos stage
// output sum_out, the sum into the next stage
// output two bottom bits of final product
// Note: Most of the multiply algorithm is performed in here.

define badd4(a[3], b[4], sum_in[4], sum_out[4], prod[2])
  // multiplier action
  //    a             b
  // i+1 i i-1         multiplier,  shift partial result two places each stage
  //  0  0  0   0    pass along
  //  0  0  1   +b   add
  //  0  1  0   +b   add
  //  0  1  1   +2b  shift add
  //  1  0  0   -2b  shift subtract
  //  1  0  1   -b   subtract
  //  1  1  0   -b   subtract
  //  1  1  1   0    pass along
signal zero[4] <= #h0;
signal bb[4];
signal psum[4];
signal b_bar[4];
signal two_b[4];
signal two_b_bar[4];
signal cout;
signal cin;
signal topbit;
signal topout;
signal nc1;
circuits
  two_b <= b[2:0].#b0 after 1ns;
  b_bar <= ~b after 1ns;
  two_b_bar <= b_bar[2:0].#b1 after 1ns;
  bb <= with a select
        #b000 : zero;
        #b001 : b;
        #b010 : b;
        #b011 : two_b;
        #b100 : two_b_bar;  // cin=1
        #b101 : b_bar;      // cin=1
        #b110 : b_bar;      // cin=1
        #b111 : zero;
        otherwise : zero;
        end select after 1ns;
  cin <= with a select
         #b100 : #b1;      // cin=1
         #b101 : #b1;      // cin=1
         #b110 : #b1;      // cin=1
         otherwise : #b0;
         end select after 1ns;
  topbit <= with a select
        #b000 : #b0;
        #b001 : b[3];
        #b010 : b[3];
        #b011 : b[3];
        #b100 : b_bar[3];
        #b101 : b_bar[3];
        #b110 : b_bar[3];
        #b111 : #b0;
        otherwise : #b0;
        end select after 1ns;
  add4 use add4(sum_in, bb, cin, psum, cout);
  add5 use fadd(sum_in[3], topbit, cout, topout, nc1);

  sum_out[1:0] <= psum[3:2] after 1ns;
  sum_out[3] <= topout after 1ns;
  sum_out[2] <= topout after 1ns;
  prod <= psum[1:0] after 1ns;
end circuits;
end badd4;

// bmul4.e   full combinatorial 4 X 4 = 8 bit two's complement multiplier
// Booth two's complement multiplication using badd4 component
// a is multiplier input, b is multiplicand input, prod is output product

define bmul4(a[4], b[4], prod[8])
signal zero[4] <= #h0;
signal mul0[3];
signal s0[4];
circuits
  mul0 <= a[1:0].#b0 after 1ns;
  a0 use badd4(mul0,   b, zero,  s0,        prod[1:0]);
  a2 use badd4(a[3:1], b, s0,    prod[7:4], prod[3:2]);
end circuits;
end bmul4;